(a) Field of the Invention
The present invention relates to a technique of manufacturing a wiring board for use in mounting an electronic component such as a semiconductor element. More particularly, it relates to a wiring board (hereinafter also referred to as “semiconductor package”) which includes a multilayer wiring structure adapted for high density and multiple functions and which has a core substrate with a novel structure for use as a base material, and also to a method of manufacturing the same.
(b) Description of the Related Art
A semiconductor package such as BGA (ball grid array), LGA (land grid array), PGA (pin grid array), or the like, is generally manufactured in the following manner. First, a core layer (a core substrate) is prepared as a base material for the package. Then, a multilayer wiring structure is formed on both surfaces of the core layer, for example, by a build-up method, in which the formation of a conductive pattern (a wiring layer), the formation of an insulating layer, and the formation of a via hole in the insulating layer are repeated in this order. Finally, the outermost wiring layer is coated with a protection film (a solder resist layer), and an opening is formed in a desired position in the protection film to thereby expose a portion (a pad portion or a land portion) of the conductive pattern through the opening. Furthermore, in the case of BGA or PGA, a ball, a pin or the like to function as an external connection terminal is bonded to the exposed pad portion or the like. In such a semiconductor package, a chip such as a semiconductor element is mounted on one surface side thereof, and an external connection terminal is provided on the other surface side. The semiconductor package is then mounted on a packaging board such as a printed circuit board, through the external connection terminal. In other words, the chip and the packaging board are electrically connected to each other with the semiconductor package interposed therebetween.
To this end, the core substrate of the semiconductor package has a through hole formed therethrough as means for providing electrical connection between both surfaces of the core substrate, and the through hole has a conductive material (a conductor) filled therein. The wiring layer formed on one surface side of the core substrate and the wiring layer formed on the opposite surface side thereof are electrically connected to each other via the conductor (hereinafter also referred to as “through-hole electrode”) filled in the through hole.
An example of techniques related to the above-mentioned conventional art is disclosed in Japanese unexamined patent Publication (JPP) (Kokai) 2006-228947. A method of manufacturing a semiconductor device described in this publication is as follows. First, a first support is mounted on a front surface of a substrate. Then, the substrate is thinned on the back surface thereof. Thereafter, the first support is removed from the substrate, and a second support having an opening is mounted on the back surface of the substrate. A first insulating film is then formed on the front surface of the substrate, and a through hole is formed in the substrate so as to be linked to the opening of the second support. Sequentially, a second insulating film is formed in the through hole of the substrate, and thereafter, an electrical conductor is filled into the through hole of the substrate.
In the conventional wiring board with multilayer wiring structure as mentioned above, the through-hole electrode is formed in the core substrate for use as the base material for the wiring board, and the wiring layers are stacked by the build-up method one on top of another on both surfaces of the core substrate in such a manner as to be connected to the through-hole electrode.
This leads to the need for the formation of a considerable number of wiring layers on both surfaces of the core substrate, and in turn, to a problem in that the entire thickness of the wiring board is increased. In particular, the utilization of the wiring board as a package for a CPU requires the formation of a considerably larger number of wiring layers because of the need for stacking a considerable number of wiring layers for use as power supply layers or ground layers, as compared to the number of wiring layers for use as signal layers. In this case, the above problem is more remarkable.
Also, the conventional process requires separate steps for a process (such as a plating process) for forming the through-hole electrode in the core substrate and a process (such as a plating process) for forming build-up wirings. In particular, the utilization of the wiring board as a package for a CPU requires the use of the build-up method for stacking a considerably larger number of wiring layers, and thus causes an increase in the number of steps, resulting in a problem of a rise in manufacturing cost.